* RF Power Amp Driver

 RF Power Amp Driver  (one stage) 

PA Lessons, PA Verified by computing the exact KCL residual at its converged solution, not because of blow up of MNA

SMITH Chart,  Explain Smith Chart

Design Work Flow

Design matching network

artifact slides

corrected; Angelov model  (share)

PA revision with physical accuracy

what has been changed (shifting not chasing, good)

MNA

Optimizer Apply MNA

what has been changed surface, reality

artifact

artifact 

Optimizer Apply Harmonic (close the loop)

change v9 MNA vs V21 Harmonic

Doherty architecture

Gemini 3.0 Pro

Opus 4.7 Adaptive

Doherty

Doherty PA 的真實規格範圍

PAPR、Back-off、與 Doherty 的存在理由(share)

v22

change documentation

visualization (pt A&B by tuning v22 2.2*Vdd, 2*Vdd too tight)

learning roadmap

v23 self-heating loop

v24 MNA for S parameters

v25* IMN+OMN, brute force+ NM Opti.

 corrected, v26* IMN+OMN, brute force+ CMA-ES (v23-v26 change log)

block diagram artifact

RF PA driver with 10 dBm output (not PA itself) (code, artifact, realistic spec, not just renaming)

Vdd @N3E nominally 0.75, max 0.8 V. The simulator default 3.3 V, too high

fix 2. thick ox 1.8v N4P corrected, cascode (option single also works.) HB, Newton compute -- educational, no novelty

Dev Log

Note: The Angelov model is the wrong device model for CMOS FinFETs (use BSIM-CMG or at least a FinFET-fitted surface-potential model), "N3E-RF" isn't a real process offering, and the Apple C1 framing implies an integrated Doherty PA that doesn't exist in that chip.