Analog IC Design (OP741, diff pair, Parameter Optimization, Placement & Rotuing)

BJT Differential Pair 

schematic

Common issues

Quadratic  Placement

ILP+ PathFinder +A* Routing

 (share)

Plus Pseudo Multi-layer Router (95% reduction of congestion md) no via report

corrected vias reported

Plus Symmetry Hard Constraint (cong=0 match>97%, artifact)

neat lohas style

2-stage diff pair 

(share from very simple diff pair), block diagram, schematic, schematic (B&W), die, Miller Compensation,miller slides,  slides detailed, 

corrected

P&R, P&R Best from 1 stage diff pair

tuned

Phantom exclusion 

artifact

 viz

add overlap penalty in placement stage

benchmark

OP 741

 schematic,  die, P&R