Two-stage Cascode Class-AB RF power amplifier

 Two-stage Cascode Class-AB RF power amplifier targeting 5G n78 (3.5 GHz) in TSMC 28nm RF

Build Sub 6 GHz Power Amplifier Optimizer with Die Synced

Prompts, artifact (Closed-Form), artifact (MNA)

Load-Pull Contours (analytical)

Load-Pull Contours (MNA mixed)

RF Power Amp Driver TSMC N16FFC-RF (one stage)

 RF Power Amp Driver TSMC N16FFC-RF (one stage)

 (Apple C1 by TSMA N4P is more advanced, no longer apply, not even N3E)

PA Lessons, PA Verified by computing the exact KCL residual at its converged solution, not because of blow up of MNA (share)

PA revision with physical accuracy

what has been changed (shifting not chasing, good)

MNA

Optimizer Apply MNA

what has been changed surface, reality

artifact

artifact (slides)

Optimizer Apply Harmonic (close the loop)

change v9 MNA vs V21 Harmonic

v22

change documentation

visualization (pt A&B by tuning v22 2.2*Vdd, 2*Vdd too tight)

block diagram artifact

RF PA driver with 10 dBm output, not PA itself (realistic spec, not just renaming)

TSMC N16FFC-RF revision (under construction)

PA Driver, Real C1 transceiver RF blocks on N4P

 TSMC N4P

artifact stacked-FET topologies

artifact

artifact

PA Driver, Real C1 transceiver RF blocks on N4P would be stacked-FET topologies on ~0.9 V core or 1.8 V I/O devices

EX#7 Mathematical Optimization

 Assignment Structure 作業架構

md version 

Deadline:  Next Saturday at 23:59 (one more week) 期中考緣故，順延一周

Send all the share links to  me chang212@gmail.com by email with subject EX#7 [your id, your name]

Students choose from three progressively harder assignments. Each builds on the interactive "Optimization in Hyperspace" 3D visualizer, which demonstrates five algorithms navigating a fitness landscape.

同學從三份難度遞增的作業中逐一完成。每份皆以互動式「超空間最佳化」3D 視覺化工具為基礎，展示五種演算法在適應度地形上的行為。

Problem 1 — Conceptual Understanding 概念理解

• Task 任務： Written reflection (300–500 words) on how each algorithm behaves on the landscape — local vs. global optima, exploration vs. exploitation.
• 撰寫心得（300–500字），描述各演算法在地形上的行為差異——區域最佳解 vs. 全域最佳解、探索 vs. 開發的取捨。
• Deliverable 繳交物： md (1–2 pages)
• Difficulty 難度： ★☆☆

Problem 2 — Mathematical Analysis 數學分析

• Task 任務： Implement gradient descent from scratch on a multimodal 2D function f(x,y) = sin(x)·cos(y) + 0.1(x² + y²). Test 3 starting points × 3 learning rates. Plot the surface + convergence paths.
• 自行實作梯度下降法，應用於多峰 2D 函數。測試 3 個起點 × 3 種學習率 (α = 0.01, 0.1, 0.5)，繪製曲面與收斂路徑。
• Deliverable 繳交物： Code + 1-page report in artifact
• Difficulty 難度： ★★☆

Problem 3 — Comparative Algorithm Design 演算法比較實驗

• Task 任務： Compare Gradient Descent vs. Simulated Annealing (exponential cooling T(t) = T₀·γᵗ). Run 50 trials each from random starts; vary T₀ and γ; produce success-rate table + plot.
• 比較梯度下降 vs. 模擬退火法（指數冷卻排程）。各執行 50 次隨機起點實驗，調整 T₀ 與 γ，製作成功率表格與圖表。
• Deliverable 繳交物： Code + 1–2 page analysis with table & plot in artifact
• Difficulty 難度： ★★★

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Five Algorithms in the Visualizer 視覺化工具中的五種演算法

Algorithm 演算法	Type 類型	Key Trait 特性
Gradient Descent 梯度下降	Local 區域	Follows steepest slope; gets trapped in local optima 沿最陡方向走，易陷入區域最佳解
Nelder-Mead 單純形法	Local 區域	Derivative-free simplex; can stall near local optima 無需導數，但仍可能停在區域解
A* Search A*搜尋	Heuristic 啟發式	Graph-based, uses heuristic to guide search 圖形搜尋，以啟發函數引導
Simulated Annealing 模擬退火	Global 全域	Accepts worse moves probabilistically; escapes traps 以機率接受較差解，可跳脫陷阱
Global Optimization 全域最佳化	Global 全域	Systematic global search 系統性全域搜尋

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Grading Notes 評分備註

• problem 1 is reflection-based — check for genuine engagement with the visualizer, not just generic definitions. HW1 為心得型——確認同學確實操作過視覺化工具，而非僅抄定義。
• problem 2, 3 require working code — verify plots are generated from their own implementation, not copied. HW2/HW3 需繳交可執行程式碼——確認圖表由自己實作產生。
• problem 3 requires statistical rigor (50 runs, multiple parameter settings). Check for proper experimental design. HW3 需具備統計嚴謹度（50次試驗、多組參數），檢查實驗設計是否完整。

RF PA IC Design Sub 6 GHz

Two-stage cascode Class-AB RF power amplifier targeting 5G n78 (3.5 GHz) in TSMC 28nm RF

Build Sub 6 GHz Power Amplifier Optimizer with Die Synced

Prompts, artifact (Closed-Form), artifact (MNA)

Load-Pull Contours (analytical)

Load-Pull Contours (MNA mixed)

Placement of GaN on SiC 2 stage RF AMP

original , fixed (hardcoded), SA 1, QP, QP+SA (MNA, Small WireLen, non 0 viol.), 

• QP+SA with adaptive cooling schedule (2.55 WireLen, usual. 0 viol.) 
• add congestion penalty in energy (track overflow significantly reduced,  Bench, Overflow Comp, viz, detail viz)

QP+ILP+PrePass (No A* or SA, viol.) comparison with ACS  detail

Slides fit of SA for RF PA Layout

RF Power Amp Driver TSMC N16FFC-RF (one stage)

 (Apple C1 by TSMA N4P is more advanced, no longer apply, not even N3E)

PA Lessons, PA Verified by computing the exact KCL residual at its converged solution, not because of blow up of MNA (share)

PA revision with physical accuracy

what has been changed (shifting not chasing, good)

MNA

Optimizer Apply MNA

what has been changed surface, reality

artifact

artifact (slides)

Optimizer Apply Harmonic (close the loop)

change v9 MNA vs V21 Harmonic

v22

change documentation

visualization (pt A&B by tuning v22 2.2*Vdd, 2*Vdd too tight)

block diagram artifact

RF PA driver with 10 dBm output, not PA itself (realistic spec, not just renaming)

TSMC N16FFC-RF revision (under construction)

TSMC N4P

artifact stacked-FET topologies

artifact

artifact

PA Driver, Real C1 transceiver RF blocks on N4P would be stacked-FET topologies on ~0.9 V core or 1.8 V I/O devices

slides wrap-up

EX#6 A* scheduling

本次習題基本說明

進階說明

Handouts 課堂講義

LLM 遭遇 多個限制條件的複雜問題 

專注力模型

Comparison of LLMs

Claude Opus 4.6 optimal (visualizing how AI thinks)

Gemini 3.0 Pro 推理，optimal

ChatGPT 5, end results 流程圖  feasible, not optimal，＊

Grok 4 ，end results 流程圖 ＊

Visualization

Decision Tree (share)

location-based time-evolving diagram (space-temporal transformation ), minimalist

animation on map (national & local) share

課堂練習 

Deadline:  Saturday at 23:59 (one more week)

Send all the share links to  me chang212@gmail.com by email with subject EX#6 [your id, your name]

任選一題就可以

 1. 搶救感恩節晚餐大作戰講義 題目 使用ＡＩ推理或用程式計算出最佳計畫， 然後將求解過程視覺化

推理視覺化（動畫）

style 1

style 2

A* 搜尋樹狀圖（動畫）

style 1

style 2

2. 搶救感恩節晚餐大作戰講義 題目 使用ＡＩ推理或用程式計算出最佳計畫， 然後將得出結果視覺化

狀態圖(State Diagram) 

 (interactive timeline) artifact state diagram

 (interactive timeline) artifact map version

state diagram with aligned timeline

看板圖 (Kanban)

 (interactive timeline)

流程圖(Flow chart)

 (interactive timeline) artifact state diagram

timed flowchart with interactive timeline (share)

Logic circuit design

Logic Circuit Design

slides

EX#5 A* circuit optimization

本次作業詳細說明

  課堂練習 

Deadline: This Saturday at 23:59

Send all the share links to  me chang212@gmail.com by email with subject EX#5 [your id, your name]

1. Design a Two-Stage BJT Amplifier according to goals specified using A* (Parameters to optimize RE1, RC1. RE2. RC2) 

A* search for optimization, share  (c_mu=3 pF, c_pi=22 pF)

2. Optimize LM3886 class AB audio amplifier IC using A* (Parameters to optimize: resistors except the load) 

LM3886

A Search Setup*

• State space: 5 components × 5 E12 values each = 3,125 possible states
• g(n): actual steps taken from the start configuration
• h(n): circuit performance cost (the heuristic) — sum of 5 weighted penalties
• f(n) = g + h: A* priority queue ordering

Cost function (5 components, all minimized):

• Gain: quadratic penalty for deviation from 26 dB (20×)
• f_low: penalty if low-frequency cutoff exceeds 10 Hz
• f_high: penalty if high-frequency cutoff falls below 100 kHz
• Bias: penalizes Rb1 ≠ Rb2 (asymmetric thermal tracking)
• Re stability: log-scale penalty away from 0.47 Ω optimum

Weight/ Forms

Are Re1 and Re2 Always Equal?

the architecture inside the LM3886 and TDA7293

optimizer A* (share)

GPU on a silicon die

 GPU

3D visualization of the GB202 fabrication process , GB202 die, process detailed (share)

CNN signal flow on a block level on a die 

EX#4 Search and Visualizaiion

 Handouts

Chain of Thought with Example, Make your AI powerful

Constraints,  Visualization on energy landscape

Search Algorithms: A*, BFS, Dijkstra

River Puzzles  (Pz 2, Pz 20) by Chain of Thought vs. Search Algortihms

BFS/A* Scalability: 8 vs. 20 persons

  課堂練習 

Deadline: This Saturday at 23:59

Send all the share links to  me chang212@gmail.com by email with subject EX#4 [your id, your name]

任選一題

1.   

Solve Pz 2  by A*/BFS

Animate search tree with synced progression (A*/BFS side-by-side)

 2. 

Solve Pz 20 by  A*/BFS 

Animate search tree with synced progression (A*/BFS side-by-side)

3.  Solve Dog Ball Retrieval by A*/BFS 

Animate search tree with synced progression (A*/BFS side-by-side)

Circuit Design and Optimization

 

• 

  
  
  
  Basic Electronics

• Electronics, Example 6 (2-Stage, A*)

• Electronics, Example 7 (AB, A* Design)